Semiconductor devices such as logic and memory devices are typically fabricated by a sequence of processing steps applied to a specimen. The various features and multiple structural levels of the semiconductor devices are formed by these processing steps. For example, lithography among others is one semiconductor fabrication process that involves generating a pattern on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated on a single semiconductor wafer and then separated into individual semiconductor devices.
A lithographic process, as described above, is performed to selectively remove portions of a resist material overlaying the surface of a wafer, thereby exposing underlying areas of the specimen on which the resist is formed for selective processing such as etching, material deposition, implantation, and the like. Therefore, in many instances, the performance of the lithography process largely determines the characteristics (e.g., dimensions) of the structures formed on the specimen. Consequently, the trend in lithography is to design systems and components (e.g., resist materials) that are capable of forming patterns having ever smaller dimensions.
Inspection processes based on optical metrology are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield. Optical metrology techniques offer the potential for high throughput without the risk of sample destruction. A number of optical metrology based techniques including scatterometry implementations and associated analysis algorithms to characterize device geometry have been described. However, it remains a challenge to reduce the measurement box size.
A small measurement box size is especially important in semiconductor inline product metrology where the area available for metrology targets is minimal. The need to reduce the size of metrology targets is becoming more important as multiple metrology targets are being introduced across the wafer to better understand cross-wafer process changes. Thus, to minimize the amount of wafer area dedicated to metrology, target sizes must be reduced, along with the effective measurement box size.
The measurement box size refers to the minimum area on the specimen where measurement results are stable and not affected by edge effects (e.g., due to optical diffraction wings) in optical metrology. Hence, the smaller the measurement box size, the smaller the area required for metrology targets. In the semiconductor industry, where wafer space allocated to metrology targets is limited (often, within the scribe line or even within die), the desired box size specification can be often very challenging, such as 30 μm×30 μm, 10 μm×10 μm, or even smaller.
In general, it is often desirable to configure metrology systems with multiple angles of incidence and several wavelength bands to improve measurement results. For example, metrology systems having multiple angles of incidence are described by U.S. Pat. No. 6,429,943 entitled “Critical dimension analysis with simultaneous multiple angle of incidence measurements,” issued Aug. 6, 2002, to KLA-Tencor Corporation, the contents of which are incorporated by reference as if fully set forth herein. In another example, metrology systems having several wavelength bands are described by U.S. Pat. No. 7,061,614 entitled “Measurement system with separate optimized beam paths,” issued Jun. 13, 2006, to KLA-Tencor Corporation, the contents of which are incorporated by reference as if fully set forth herein. However, in many examples, the use of multiple angles of incidence and multiple wavelength bands gives rise to geometric effects, diffraction, aberration, and other image quality effects that cause an undesirable enlargement of the measurement box size.
In some examples, measurement box size is reduced by minimizing spillover illumination light projected onto the measurement target outside of the measurement target area. In the past, the illumination spot size was reduced by increasing the system NA and reducing the size of the illumination aperture (e.g., a polarizer slit). Although increasing the NA addresses diffraction induced spillover, increasing the NA increases aberrations, increases cost, creates optical alignment difficulties, and reduces the transmission efficiency of the optical system. Although reducing the size of the illumination aperture addresses geometrical properties of the spot image, the reduction in size of the illumination aperture increases coherence effects, reduces light throughput, and requires a tightening of optical system tolerances.
In another example, large spot size illumination is used to illuminate the target and spillover light illuminates structures outside of the measurement target area. The collected signals are projected as an image onto a CCD image sensor. Only the signals associated with the measurement target are selected from the CCD image. Although, this may effectively reduce measurement box size for image based measurements, this approach cannot be used with spectroscopic signals.
It should also be noted that in some examples, a reduction in illumination spot size may not result in a reduced measurement box size. In particular, the interaction of illumination light with deep structures causes light to be scattered and reflected. This light, in turn, interacts with structures outside of the target area. In these examples, even if the illumination spot lands within the target area, the collected signals may still be contaminated from the light interactions with structures outside of the target area.
Despite existing approaches designed to control measurement box size, achieving a small measurement box size specification over the full measurement range is very challenging. This is especially the case at both large oblique angles of incidence (AOI), where the incident beam covers a larger area, and at longer wavelengths, where diffraction effects introduce significant limitations.
As lithographic and inspection systems are pressed to higher resolutions, measurement box size becomes a limiting factor in maintaining device yield. Thus, improved methods and systems for achieving a small effective measurement box size associated with a variety of metrology technologies are desired.